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Time-Driven Cache Attacks

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Abstract

When a load instruction incurs a cache-miss, a block of memory from the lower level of the memory subsystem is loaded into a cache line. Consequently, the memory access would require considerably more time and power, and has a characteristically different electromagnetic radiation compared to when a cache-hit occurs. The loads that result in cache misses are easily distinguishable from the cache hits. These indirect manifestations of a memory access can be used by an attacker to gain considerable insight about the application currently being executed. In this chapter, we show how information about the secret key of a cipher can be gleaned from the execution time of a block cipher. We start the chapter with a simple illustration showing how information can be obtained from memory access patterns before discussing attacks on ciphers.

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Correspondence to Chester Rebeiro .

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Rebeiro, C., Mukhopadhyay, D., Bhattacharya, S. (2015). Time-Driven Cache Attacks. In: Timing Channels in Cryptography. Springer, Cham. https://doi.org/10.1007/978-3-319-12370-7_4

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  • DOI: https://doi.org/10.1007/978-3-319-12370-7_4

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-12369-1

  • Online ISBN: 978-3-319-12370-7

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